The prior art is described below with reference to the accompanying FIG. 1 showing the circuit diagram of the comparator-detection, which is traditionally used as the detection method in prior art paging systems.
FIG. 1 shows the circuit diagram of the comparator-detection, which is traditionally used as the detection method in prior art paging systems. The incoming signal is modulated by 4 level frequency shift keying (4FSK), said modulated signal is received in the FM detection block 1. The FM detected and 4 level pulse amplitude modulated (4PAM) signal is supplied to the inputs of comparator-detectors (2-5), in which the signal is compared with fixed decision levels. The comparison result is the information about which symbol was received. The outputs of the comparators are connected tot he decoding & symbol decoding block 6, which provides the outgoing data.
A disadvantage of detectors with fixed levels, which is overcome by the present invention, is that their decision levels must be manually tuned in order to provide the best detection result.
In such prior art pagers the pager front ends before detection have varying electrical properties and the characteristics of the components in different pager units will change. This can lead to erroneous detection results in detectors with fixed levels. The components of the front end in a prior art pager with a detector with fixed levels must be of very high and uniform quality in order to avoid erroneous detection results.
Such prior art detectors with fixed levels do not react to changes in the signalling frequencies. An erroneous detection result will probably be the result if the signalling frequencies change compared with the pager.